Host device, storage device, and method for accessing storage device

ABSTRACT

A host device is connected to a storage device via a bus and reads and writes data in the storage device. The host device includes a command transmitter that sequentially transmits a command in a command sequence, which includes a set of commands which do not change data stored in the storage device, and a response receptor that accepts a response from the storage device for each command transmission from the command transmitter and determines whether or not an error exists. An acceptable/unacceptable access determiner provided in the host device enables access to the storage device when a normal response is identified by the response receptor and otherwise determines that access to the storage device is unacceptable. The normal response is when the responses received from the storage device for the transmissions of all commands in the command sequence do not include an error.

This is a divisional application of pending U.S. patent application Ser.No. 11/571,592, filed Jan. 3, 2007, which is a National Stage ofInternational Patent Application No. PCT/JP05/011799 filed Jun. 28, 2005which claims priority under 35 U.S.C. §119 of Japanese Application No.2004-201511 filed on Jul. 8, 2004 the disclosures of which are expresslyincorporated by reference herein in their entireties.

TECHNICAL FIELD

The present invention relates to a host device, storage device, andmethod for accessing the storage device that execute the initializationof the storage device and data transmission/reception with use of acommand, wherein the storage device is connected to the host device.

BACKGROUND ART

In devices (referred to as host devices below) that control digital datasuch as a digital camera, movie, and portable music player, there is amemory card, as a storage device for retaining digital information,mounting a non-volatile memory. In order to realize compatibilitybetween memory cards manufactured by multiple makers and host devices, ascheme for the host device to access a memory card is standardized. Aversion of the standard is upgraded along with enlargement of capacityand addition of functions of a memory card. A method for making a hostdevice to execute access by showing different storage capacities to eachhost device with use of multiple ways of capacity reference is proposed(for example, see Patent document 1).

-   Patent document 1: Unexamined Patent Publication 2004-86505.

DISCLOSURE OF INVENTION Problems to be Solved by the Invention

However, the conventional technique described above has followingproblems. That is to say, there is such a problem that a host device ofan old version may destroy data written by a host device of a newversion because host devices which are in different versions can accessthe same storage area. Also, there is such a problem that internalconfiguration and control of a memory card becomes complex sincemultiple areas are provided in a memory card and access control based ona host device is executed.

In view of the above mentioned problem, the present invention isdesigned to provide a host device, storage device, and method foraccessing a storage device which can execute access control in simpleconfiguration and control.

Means to Solve the Problems

To solve the problem, a host device which is connected to a storagedevice via a bus and reads and writes data in the storage devicecomprising: a command transmission unit for sequentially transmitting acommand in a command sequence composed of a set of commands which doesnot cause change on data stored in the storage device; a responsereception unit for accepting a response from the storage device for eachcommand transmission from the command transmission unit and determiningwhether an error exists or not; and an acceptable/unacceptable accessdetermination unit for enabling access when normal reception isidentified by the response reception unit after each commandtransmission from the command transmission unit and otherwisedetermining that access to the storage device is unacceptable.

To solve the problem, a storage device which is connected to a hostdevice via a bus and stores and reads data based on a command from thehost device comprising: a memory for retaining data given from the hostdevice; a memory control unit for controlling data-reading anddata-writing to the memory; a command reception unit for receiving acommand issued from the host device and executing processing inaccordance with each command; a response transmission unit for returninga response in the case of a predetermined command every time when thecommand reception unit receives each command; and an accessdetermination unit for determining whether a command received by thecommand reception unit is a predetermined command sequence or not andaccepting access when the command sequence is the predetermined commandsequence.

To solve the problem, a method for accessing a storage device by a hostdevice which is connected to the storage device via a bus and reads andwrites data in the storage device comprising: sequentially transmittinga command in a command sequence composed of a set of commands which doesnot cause change on data stored in the storage device; accepting aresponse from the storage device for each command transmission anddetermining whether an error exists or not; and enabling access whennormal reception is determined after each command transmission andotherwise determining that access to the storage device is unacceptable.

Effectiveness of the Invention

In the present invention, a host device, storage device, and method foraccessing a storage device which can execute access control in simpleconfiguration and under simple control can be provided since the storagedevice determines a sequence of a transmission command from the hostdevice and determines access from the host device as acceptable when thesequence is identical with a predetermined sequence.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram showing a configuration of a storage systemaccording to an embodiment of the present invention.

FIG. 2 is a flowchart showing first command sequence processing in ahost device.

FIG. 3 is a flowchart showing second command sequence processing in thehost device.

FIG. 4 is a flowchart showing reception processing of the first commandsequence in a storage device.

FIG. 5 is a flowchart showing reception of the first and second commandsequence processing in the storage device.

FIG. 6 is a flowchart showing third command sequence processing in thehost device.

FIG. 7 is a flowchart showing reception processing of the third commandsequence in the storage device.

FIG. 8 is a flowchart showing fourth command sequence processing in thehost device.

FIG. 9 is a flowchart showing reception processing of the fourth commandsequence in the storage device.

FIG. 10 is a flowchart showing processing after determining access fromthe host device as unacceptable.

DESCRIPTION OF REFERENCE NUMERALS

-   1 Host device-   101 CPU-   102 ROM-   103 RAM-   104 Interface-   101 a Command transmission unit-   101 b Response reception unit-   101 c Access determination unit-   2 Storage device-   201 Interface-   202 Control unit-   203 Memory control unit-   204 Memory-   202 a Command reception unit-   202 b Response transmission unit-   202 c Access determination unit-   3 Bus

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a block diagram showing a configuration of a storage systemaccording to an embodiment of the present invention. As shown in FIG. 1,the storage system according to the embodiment of the present inventionincludes a host device 1 and storage device 2 and connects the storagedevice 2 to the host device 1 with use of a bus 3. The host device 1includes a CPU 101, ROM 102 for storing one or more programs for the CPU101, RAM 103 for a work area of the CPU, and interface 104. Theinterface 104 transmits a command, data, and addresses to the storagedevice 2 and receives a response. The ROM 102 stores one or more accessprograms for realizing an access method executed by the CPU 101 and oneor more command sequences used by the host device 1. In addition, theCPU 101 achieves a function of a command transmission unit 101 a,response reception unit 101 b, and access determination unit 101 c. Thecommand transmission unit 101 a transmits a command sequentially in acommand sequence composed of a set of commands retained in the ROM 102via the interface 104. The response reception unit 101 b accepts aresponse each command transmission from the command transmission unitand determines whether an error exists or not. After each commandtransmission, the access determination unit 101 c determines whetheraccess is acceptable or not in a way that access is approved when normalresponse is identified by the response reception unit and otherwiseaccess is disapproved.

The storage device 2 includes an interface 201, control unit 202, memorycontrol unit 203, and memory 204. The interface 201 receives a commandand data from the host device 1 and transmits a response. In addition,the control unit 202 includes a command reception unit 202 a, responsetransmission unit 202 b, and access determination unit 202 c. Thecommand reception unit 202 a receives a command issued from the hostdevice and executes processing corresponding to each command. Thereception transmission unit 202 b, each time the command reception unitreceives a command, determines whether the command is based on apredetermined command sequence or not, and normally responds in the caseof the command of the predetermined command sequence. In addition, theaccess determination unit 202 c determines whether the command receivedby the command reception unit is the predetermined command sequence ornot, and executes processing for accepting access in the case of thepredetermined command sequence. The memory control unit 203 controlsreading and writing of data from and to the memory 204 and the memory204 retains data given from the host device. The storage device 2 checkswhether a command sequence transmitted from the host device 1 is apredetermined sequence or not and determines access from the host device1 is acceptable in the case of the predetermined command sequence.

FIG. 2 is a flowchart showing a first example of a command sequencetransmitted by the host device 1. In the command sequence of FIG. 2, thehost device 1 transmits a command CMD_A at first (S201). And then thehost device waits for a response from the storage device 2 (S202) andchecks an error when receiving a response (S203). When the response isreceived and no error exists, a command CMD_B is transmitted at stepS204. And, the host device waits for a response (S205) and checks anerror when receiving the response (S206). When the response is receivedand no error exists, a command CMD_C is transmitted at step S207. And,the host device waits for a response at S208 and checks an error whenreceiving the response (S209). When no error exists at S209, it isdetermined that the storage device 2 approves access from the hostdevice 1 because the response is returned correctly (S210). On the otherhand, when no response or an error response is retuned to any of thecommands, it is determined that the storage device 2 disapprove accessfrom the host device (S211).

The commands CMD_A, CMD_B, and CMD_C used for the command sequenceherein can be any commands which do not change data of the memory 204 inthe storage device 2. For instance, a command for accessing a registeror command for reading ID of the storage device 2 can be used. A commandonly for detecting whether normal access to the storage device ispossible or not may be used.

FIG. 3 is a flowchart showing a second example of a command sequenceused by the host device. In the command sequence of FIG. 3, the hostdevice 1 transmits the command CMD_C at first (S301). And then the hostdevice waits for a response from the storage device 2 (S302) and checksan error when receiving the response (S303). When the response isreturned and no error exists, the command CMD_B is transmitted at stepS304. And, the host device waits for a response (S305) and checks anerror when receiving the response (S306). When the response is receivedand no error exists, the command CMD_A is transmitted at step S307. And,the host device waits for a response at S308 and checks an error at S309when receiving the response. When no error exists at S309, it isdetermined that the storage device 2 can accept access from the hostdevice since the response is returned correctly (S310). When no responseor an error response is retuned to any of the commands, it is determinedthat the storage device 2 does not accept access from the host device(S311). When it is determined that access is unacceptable, the storagedevice may completely reject a subsequent command from the host deviceor may wait for a correct sequence again.

The host device 1 may use only a specific command sequence, for example,a host device meeting a standard of an old version may use one of thecommand sequences of FIG. 2 and FIG. 3 and a host device meeting astandard of a new version may use other command sequence. In addition,the host device meeting the standard of the new version may use both ofthe command sequences of FIG. 2 and FIG. 3.

FIG. 4 is an example of a flowchart of command reception processing inthe storage device 2 accepting a first command sequence. When a commandis received by the command reception unit 202 a (S401), the storagedevice 2 checks whether the command is a CMD_A or not. In the case ofthis command, the storage device executes the command at step S403 andresponds to the command. Further more, command reception is checked atstep S404, when a command is received, it is checked whether the commandis a CMD_B or not (S405). When the command is the CMD_B, the storagedevice executes the command and responds at step S406, and waits for anext command. When a command is further received at step S407, it ischecked whether the command is a CMD_C or not at step S408. In the caseof the command, the storage device executes the command and responds atstep S409. Since the commands correspond to a predetermined sequence,the storage device accepts subsequent access of a host device andresponds to this (S410). After that, access of the host device isaccepted with including data-writing to the storage area 201.

On the other hand, when the commands do not meet the predeterminedsequence, an error response is made (S411). In FIG. 4, the storagedevice 2 accepts only access of the host device transmitting a commandin the sequence of commands CMD_A, CMD_B, and CMD_C shown in FIG. 2. Inaddition to the error response, the order of the command sequence to beaccepted by the storage device may be transmitted to the host device 1.In stead of the error response at S411, no response may be taken as anerror.

FIG. 5 is a flowchart showing command reception processing of thestorage device 2 corresponding to the first and second commandsequences. In FIG. 5, when a command is received at S501, it is checkedwhether the command is the CMD_A or not (S502). In the case that thecommand is the CMD_A, the storage device executes necessary processingand responds (S503) and, subsequently, receives a command. Subsequentprocessing of S504 to S511 is the same as the processing of S404 to S411in FIG. 4.

When a command is not the CMD_A in S502, it is checked whether thecommand is the CMD_C or not. When the command is the CMD_C, the storagedevice responds at S513 after executing the command and waits for acommand at step S514. When the command is received, it is determinedwhether the command is the command CMD_B (S515) or not, when the commandis the CMD_B, the storage device executes necessary processing andresponds (S516). When a further command is received (S517), it isdetermined whether the command is the CMD_A (S518) or not. When thecommand is the CMD_A, the storage device executes necessary processing,responds (S519), and accepts access by a host device (S510). Inaddition, since the accepted command sequence is different from that inS509, access may be accepted as a command sequence having a differentfunction on the storage device side at step S519. When the commandsequence is different from the predetermined sequence in steps S512 toS518, the storage device executes an error response or does not respond(S520). Thus the storage device 2 can determine a plurality of commandsequences. That is, the storage device 2 accepts access from the hostdevice transmitting a command in the first or second sequence shown inFIG. 2 or FIG. 3. Since the number of sequences determined by thestorage device 2 is not limited to two, more sequences can bedetermined.

Next, a method for increasing kinds of command sequences with use ofthree commands will be explained. FIG. 6 is a flowchart showing commandtransmission processing by the third command sequence from the hostdevice 1. When an operation starts, the command CMD_A is transmitted atS601 and it is determined whether a response is received or not (S602).And, when the response to the CMD_A is received, an error is checked atS603, if no error exists, the CMD_A is transmitted in the predeterminednumber of times in a similar way (S601, S602, and S612). After that, thecommand CMD_B is issued. Subsequent processing of S604 to S611 is thesame as that of S204 to S211 in FIG. 2.

A flowchart on the side of the storage device 2 corresponding to thethird command sequence will be explained with use of FIG. 7. When thestorage device 2 receives a command in a manner shown in the flowchartof FIG. 7 (S701), the storage device determines whether the command isthe command CMD_A or not (S702). When the received command is the CMD_A,the storage device 2 returns a response to the host device 1 and repeatssimilar processing until the number of repeats exceeds the number ofpredetermined times (S703 and S704). When the command is not the CMD_A,the storage device may return an error response at S712 or no responsemay be taken as an error.

Subsequent processing of S705 to S711 are the same as that of abovedescribed S404 to s410 of FIG. 4, and when commands are received inorder of the commands CMD_B (S706) and CMD_C (S709), the storage device2 determines that access by the host device 1 is acceptable. When thecommands are not the command sequence, an error response or no responseis made at S712.

Next, FIG. 8 is a flowchart showing an example of the fourth commandsequence of the host device 1. The flowchart shows a specific commandsequence, for example the first command sequence, is repeated more thanonce. Processing of S801 to S809 is the same as that of S201 to S209 andthe host device 1 transmits a command in a sequence of the CMD_A (S801),CMD_B (S804), and CMD_C (S807). When no error exists at S809, it isdetermined whether the sequence is executed in a predetermined number oftimes at S810 or not. When the times of execution do not achieve thepredetermined number, the same processing is repeated back to S801, and,when the execution of the predetermined number of times is done, it isdetermined that access is acceptable at S811. When there is no normalresponse in the process of the sequence, it is determined that access isunacceptable at S812.

FIG. 9 is a flowchart on the storage device concerning the fourthcommand sequence. In the flowchart of FIG. 9, processing of S901 to S909is the same as that of S401 to S409 of FIG. 4. And, it is determinedwhether the processing is executed in a predetermined number of times ornot. When the processing is not executed in the predetermined number oftimes, the similar processing is repeated back to S901 and, when theexecution of the predetermined number of times is done, access of thehost device is accepted at S911. If it is not normal in the process ofthe command sequence, no response or an error response is made andacceptance of access is forbidden at S912. When it is determined accessis unacceptable, no subsequent command from the host device may beacceptable or a next correct sequence may be waited for.

Access programs to the storage device 2 in the host device of FIG. 2,FIG. 3, FIG. 6, and FIG. 8 according to the embodiment as shown here areretained in the ROM 102 of the host device 1.

In the embodiment described here, a different sequence is shown bycombining the commands CMD_A, CMD_B, or CMD_C, however, an additionalother command may be used and commands constructing a sequence may bedifferent from the commands of the combination. In addition, a commandsequence transmitting commands in a predetermined number of times is notlimited to the third and fourth method and, for example, the host device1 may combine the determination of the sequence of FIG. 5 with that ofFIG. 7. And further, the specific command is transmitted in thepredetermined number of times in FIG. 6 and FIG. 7, however, Two or morecommands may be transmitted more than once. The specific command istransmitted in the predetermined number of times in FIG. 8 and FIG. 9,however, a plurality of command sequences may be repeated in apredetermined number of times. When the host device 1 transmits aplurality of commands, a transmission interval of the commands may beshorter than a predetermined period. In the case, when a transmissioninterval of the commands exceeds the predetermined period, the storagedevice 2 determines that access from the host device 1 is unacceptable.When it is determined that access is unacceptable, subsequent commandsfrom the host device may be rejected or a next correct command sequencemay be waited for again.

In the storage device 2, a plurality of command sequences may beacceptable as shown in FIG. 5, in that case, a function for beingpermitted to use in accordance with the command sequence may beswitched. For example, a kind of a file system, that is, a file systemsuch as FAT16, FAT32, or UDF may be selected and it is selected whichaddress is permitted in unit of byte or block. In addition, it may beselected whether an additional function, for example, a function ofinterruption or high-rate interface is used or not in accordance with acommand sequence at start of access.

In the storage device 2, an acceptable command sequence may betransmitted in making an error response. An operation on the host devicein the foregoing case that the acceptable command sequence istransmitted will be described. FIG. 10 is a flowchart showing processingafter the host device determines that access is unacceptable at S211, itis determined whether a command sequence is included in the response ornot at S213 after the host device determines that access isunacceptable. When the command sequence is not included at S213, retryis executed by selecting other command sequence at S215 if other commandsequence is stored in the host device. When the command sequence isincluded, it is determined whether a designated command sequence issupported or not at S214. If the command sequence is not supported,processing terminates, and if the command sequence is supported, retryis executed by transmitting a command in a designated command sequenceat S216. That is, command transmission starts in the designated commandsequence again. Thus, access can be made when a command sequence isidentical with a command sequence stored in the storage device.

INDUSTRIAL APPLICABILITY

According to the present invention, the storage device determines acommand sequence transmitted by the host device, and determines thataccess from the host device is acceptable only when the command sequenceis identical with a predetermined command sequence. As a result, accesscontrol can be executed by simple structure and control and it is usefulin a storage device such as a memory card and various sorts of hostdevices using the storage device.

1. A host device which is connected to a storage device via a bus andreads and writes data in the storage device, the host device comprising:a command transmitter that sequentially transmits a command in a commandsequence, which comprises a set of commands which do not change datastored in the storage device; a response receptor that accepts aresponse from the storage device for each command transmission from saidcommand transmitter and determines whether or not an error exists; andan acceptable/unacceptable access determiner that enables access to thestorage device when a normal response is identified by said responsereceptor and otherwise determines that access to the storage device isunacceptable, the normal response being when the responses received fromthe storage device for the transmissions of all commands in the commandsequence do not include an error.
 2. The host device according to claim1, wherein said command transmitter of said host device issues aplurality of command sequences.
 3. The host device according to claim 2,wherein said acceptable/unacceptable access determiner selects a commandsequence that is different from the command sequence transmitted fromsaid command transmitter, when it is determined that access isunacceptable.
 4. The host device according to claim 3, wherein saidacceptable/unacceptable access determiner selects an acceptable commandsequence that is transmitted from the storage device, when it isdetermined that access is unacceptable.
 5. A method for accessing astorage device by a host device, which is connected to the storagedevice via a bus and reads and writes data in the storage device, themethod comprising: sequentially transmitting a command in a commandsequence, which comprises a set of commands which do not change datastored in the storage device; accepting a response from the storagedevice for each command transmission and determining whether or not anerror exists; and enabling access to the storage device when a normalresponse is determined and otherwise determining that access to thestorage device is unacceptable, the normal response being when theresponses received from the storage device for the transmissions of allcommands in the command sequence do not include an error.
 6. The methodfor accessing a storage device according to claim 5, further comprising:selecting a command sequence to be transmitted, which is different fromthe command sequence previously transmitted, when it is determined thataccess is unacceptable.
 7. The method for accessing a storage deviceaccording to claim 6, further comprising: selecting an acceptablecommand sequence transmitted from the storage device, when it isdetermined that access is unacceptable.